ADC1206S040 Datasheet, PDF (21/32 Pages) NXP Semiconductors – Single 12 bits ADC, up to 40 MHz, 55 MHz or 70 MHz

NXP Semiconductors
12. Application information
ADC1206S040/055/070
Single 12 bits ADC, up to 40 MHz, 55 MHz or 70 MHz
220 nF
1:1
100 Ω
IN
100 Ω
INN
100 nF
5 V SH 5 V
mode
100 nF
10 nf
5V
100 nF
V_ref
100 nF
n.c.
n.c.
n.c.
n.c.
n.c.
44 43 42 41 40 39 38 37 36 35 34
1
33
2
32
3
31
4
30
5
29
6
ADC1206S070
28
7
27
6
26
9
25
10
24
11
23
12 13 14 15 16 17 18 19 20 21 22
CLK
5V
100 nF
D0 (LSB)
D1
D2
D3
D4
D5
D6
D7
D8
D9
n.c. ^n.c.
5V
n.c.
100 nF
IR D10
D11
(MSB)
chip select input
output format select
014aaa386
The analog, digital and output supplies should be separated and decoupled.
Fig 17. Application diagram
TTL
input
D
PECL
MC 100
ELT20
270 Ω
CLKN
ADC1206S
070
CLK
270 Ω
014aaa387
TTL
input
CLKN
ADC1206S
070
CLK
014aaa388
Fig 18. Application diagram for differential clock input
PECL compatible using a TTL to PECL
translator
Fig 19. Application diagram for TTL single-ended
clock
ADC1206S040_055_070_2
Product data sheet
Rev. 02 — 12 August 2008
© NXP B.V. 2008. All rights reserved.
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