ADC1006S055 Datasheet, PDF (19/31 Pages) NXP Semiconductors – Single 10 bits ADC, up to 55 MHz or 70 MHz

NXP Semiconductors
ADC1006S055/070
Single 10 bits ADC, up to 55 MHz or 70 MHz
12. Application information
12.1 Application diagrams
220 nF
1:1
100 Ω
IN
100 Ω
INN
5V
100 nF
SH
mode
5V
100 nF
CLK
5V
10 nF
100 nF
100 nF
n.c.
n.c.
n.c.
n.c.
n.c.
VREF
44 43 42 41 40 39 38 37 36 35 34
5V
100 nF
1
33
2
32
n.c.
3
31
n.c.
4
30
D0 (LSB)
5
29
D1
6
ADC1006S055/070
28
D2
7
27
D3
8
26
D4
9
25
D5
10
24
D6
11
23
D7
12 13 14 15 16 17 18 19 20 21 22
n.c. n.c.
5V
n.c.
100 nF
IR
D8
D9
(MSB)
chip select input
output format select
014aaa457
The analog, digital and output supplies should be separated and decoupled.
Fig 17. Application diagram
ADC1006S055_070_2
Product data sheet
MC100
ELT20
TTL ^D
input
CLKN
PECL
CLK
ADC1006S
055/070
270 Ω 270 Ω
014aaa458
Fig 18. Application diagram for differential clock input PECL compatible using a TTL to
PECL translator
Rev. 02 — 12 August 2008
© NXP B.V. 2008. All rights reserved.
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