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| 74HC373-Q100 Datasheet, PDF (17/24 Pages) NXP Semiconductors – Octal D-type transparent latch; 3-state | |||
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NXP Semiconductors
74HC373-Q100; 74HCT373-Q100
Octal D-type transparent latch; 3-state
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Test data is given in Table 11.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistor
S1 = Test selection switch
Fig 12. Test circuit for measuring switching times
Table 11. Test data
Type
Input
VI
tr, tf
74HC373-Q100 VCC
6 ns
74HCT373-Q100 3 V
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 kï
1 kï
S1 position
tPHL, tPLH
open
open
tPZH, tPHZ
GND
GND
tPZL, tPLZ
VCC
VCC
74HC_HCT373_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 â 10 August 2012
© NXP B.V. 2012. All rights reserved.
17 of 24
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