SAF7129AH Datasheet, PDF (16/56 Pages) NXP Semiconductors – Digital video encoder

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DATA BYTE⁽¹⁾
REGISTER FUNCTION
SUBADDR
D7
D6
D5
D4
D3
D2
D1
D0
Trigger control
Multi control
Closed caption, teletext enable
RCV2 output start
RCV2 output end
MSBs RCV2 output
TTX request H start
TTX request H delay
CSYNC advance, Vsync shift
TTX odd request vertical start
TTX odd request vertical end
TTX even request vertical start
TTX even request vertical end
First active line
Last active line
TTX mode, MSB vertical
Null
Disable TTX line
Disable TTX line
6DH
6EH
6FH
70H
71H
72H
73H
74H
75H
76H
77H
78H
79H
7AH
7BH
7CH
7DH
7EH
7FH
HTRIG10 HTRIG9 HTRIG8 VTRIG4 VTRIG3 VTRIG2
SBLBN BLCKON PHRES1 PHRES0 LDEL1 LDEL0
CCEN1 CCEN0 TTXEN SCCLN4 SCCLN3 SCCLN2
RCV2S7 RCV2S6 RCV2S5 RCV2S4 RCV2S3 RCV2S2
RCV2E7 RCV2E6 RCV2E5 RCV2E4 RCV2E3 RCV2E2
0
RCV2E10 RCV2E9 RCV2E8 0
RCV2S10
TTXHS7 TTXHS6 TTXHS5 TTXHS4 TTXHS3 TTXHS2
TTXHD7 TTXHD6 TTXHD5 TTXHD4 TTXHD3 TTXHD2
CSYNCA4 CSYNCA3 CSYNCA2 CSYNCA1 CSYNCA0 VS_S2
TTXOVS7 TTXOVS6 TTXOVS5 TTXOVS4 TTXOVS3 TTXOVS2
TTXOVE7 TTXOVE6 TTXOVE5 TTXOVE4 TTXOVE3 TTXOVE2
TTXEVS7 TTXEVS6 TTXEVS5 TTXEVS4 TTXEVS3 TTXEVS2
TTXEVE7 TTXEVE6 TTXEVE5 TTXEVE4 TTXEVE3 TTXEVE2
FAL7
FAL6
FAL5
FAL4
FAL3
FAL2
LAL7
LAL6
LAL5
LAL4
LAL3
LAL2
TTX60
LAL8
TTXO
FAL8
TTXEVE8 TTXOVE8
0
0
0
0
0
0
LINE12 LINE11 LINE10 LINE9
LINE8
LINE7
LINE20 LINE19 LINE18 LINE17 LINE16 LINE15
VTRIG1
FLC1
SCCLN1
RCV2S1
RCV2E1
RCV2S9
TTXHS1
TTXHD1
VS_S1
TTXOVS1
TTXOVE1
TTXEVS1
TTXEVE1
FAL1
LAL1
TTXEVS8
0
LINE6
LINE14
VTRIG0
FLC0
SCCLN0
RCV2S0
RCV2E0
RCV2S8
TTXHS0
TTXHD0
VS_S0
TTXOVS0
TTXOVE0
TTXEVS0
TTXEVE0
FAL0
LAL0
TTXOVS8
0
LINE5
LINE13
Note
1. All bits labelled ‘0’ are reserved. They must be programmed with logic 0.