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SAA7144HL Datasheet, PDF (16/64 Pages) NXP Semiconductors – Quadruple video input processor | |||
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Philips Semiconductors
SAA7144HL
Quadruple video input processor
8.4 Luminance processing
The 9-bit luminance signal, a digital CVBS format, is fed through a switchable preï¬lter.
High frequency components are emphasized to compensate for loss. The following
chrominance trap ï¬lter (f0 = 4.43 MHz or 3.58 MHz center frequency set according to the
selected color standard) eliminates most of the color carrier signal. It can be bypassed via
I2C-bus bit BYPS (subaddress 09h, bit 7).
The high frequency components of the luminance signal can be peaked (control for
sharpness improvement via I2C-bus subaddress 09h, see Table 33) in two band-pass
ï¬lters with selectable transfer characteristic. This signal is then added to the original
(unpeaked) signal. For the resulting frequency characteristics see Figure 11 to Figure 16.
A switchable ampliï¬er achieves common DC ampliï¬cation, because the DC gains are
different in both chrominance trap modes. The improved luminance signal is fed to the
BCS control located in the chrominance processing block; see Figure 17.
18
VY
(dB)
(1)
6
(2)
(4)
(3)
â6
â18
mgd139
(1)
(2)
(4)
(3)
â30
0
2
4
6
8
fY (MHz)
(1) 43h
(2) 53h
(3) 63h
(4) 73h
Fig 11. Luminance control SA 09h, 4.43 MHz trap, preï¬lter on, different aperture
band-pass center frequencies.
9397 750 14454
Product data sheet
Rev. 01 â 21 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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