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LPC408X-7X Datasheet, PDF (15/123 Pages) NXP Semiconductors – 32-bit ARM Cortex-M4 MCU; | |||
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NXP Semiconductors
LPC408x/7x
32-bit ARM Cortex-M4 microcontroller
Table 3. Pin description â¦continued
Not all functions are available on all parts. See Table 2 (Ethernet, USB, LCD, QEI, SD/MMC, comparator pins) and Table 5
(EMC pins).
Symbol
Description
P0[19]
P0[20]
P0[21]
P0[22]
122 L17 J10 85 -
120 M17 K14 83 -
118 M16 K11 82 -
116 N17 L14 80 44
[3] I; PU I/O
I
O
I/O
-
-
-
O
[3] I; PU I/O
O
I/O
I/O
-
-
-
O
[3] I; PU I/O
I
O
O
I
I/O
[6] I; PU I/O
O
I/O
O
O
O
P0[19] â General purpose digital input/output pin.
U1_DSR â Data Set Ready input for UART1.
SD_CLK â Clock output line for SD card interface.
I2C1_SDA â I2C1 data input/output (this pin does not
use a specialized I2C pad).
R â Function reserved.
R â Function reserved.
R â Function reserved.
LCD_VD[13] â LCD data.
P0[20] â General purpose digital input/output pin.
U1_DTR â Data Terminal Ready output for UART1. Can
also be configured to be an RS-485/EIA-485 output
enable signal for UART1.
SD_CMD â Command line for SD card interface.
I2C1_SCL â I2C1 clock input/output (this pin does not
use a specialized I2C pad).
R â Function reserved.
R â Function reserved.
R â Function reserved.
LCD_VD[14] â LCD data.
P0[21] â General purpose digital input/output pin.
U1_RI â Ring Indicator input for UART1.
SD_PWR â Power Supply Enable for external SD card
power supply.
U4_OE â RS-485/EIA-485 output enable signal for
UART4.
CAN_RD1 â CAN1 receiver input.
U4_SCLK â USART 4 clock input or output in
synchronous mode.
P0[22] â General purpose digital input/output pin.
U1_RTS â Request to Send output for UART1. Can also
be configured to be an RS-485/EIA-485 output enable
signal for UART1.
SD_DAT[0] â Data line 0 for SD card interface.
U4_TXD â Transmitter output for USART4 (input/output
in smart card mode).
CAN_TD1 â CAN1 transmitter output.
SPIFI_CLK â Clock output for SPIFI.
LPC408X_7X
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 â 17 September 2012
© NXP B.V. 2012. All rights reserved.
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