SAA7806 Datasheet, PDF (14/73 Pages) NXP Semiconductors – One chip automotive CD audio device

Philips Semiconductors
SAA7806
One chip automotive CD audio device
6.5 AHB core clock generation
Two independent clock dividers are used within SAA7806, one for CD-Slim and the other
for the ARM Advanced High performance Bus (AHB) core. Figure 8 gives a top level
description of the SAA7806 clocking, AHB fixed clock frequencies are given. A more
detailed description of the CD-Slim clocking is given in Figure 10.
OSCIN
94
OSCOUT
93
1.536 kHz LCD clock
CLOCK
GENERATOR
ARM/AHB/VPB clock
ARM
ANALOG CLOCK
GENERATOR
4.2336 MHz audio DAC clock
CLOCK
GENERATOR
CD-SLIM
67 MHz baseline clock
AHB
RAM
ROM
SMIU
AHB/
VPB
INTERFACE
VPB
PDSIC
8.4672 MHz
PDSIC clock
AHB and VPB
operate at
ARM
frequency
LCD
GPIO
INTERRUPT
CONTROLLER
UART
I²C-BUS
I²S-BUS
HANDLER
AUDIO
DAC
Fig 8. Clocking top level
9.6768 MHz I²C-bus clock
I²S-bus bit clock
001aab752
6.6 Channel decoder
6.6.1 Features
The channel decoder in the SAA7806 is derived from the design used in the SAA7817
DVD decoder IC. The design has been optimized for CD decode functionality (i.e.
EFMPlus demodulation has been removed) and has the following features:
• 1-channel interface to the on-chip 6-bit 67 MHz AD converter
• Signal conditioning logic with high-pass filter, DC offset cancellation (Analog Offset
Cancellation; AOC) and AGC logic
• HF defect detection circuitry with automatic hold of AGC, AOC, High-Pass Filter
(HPF), PLL and slicer on defect detection
• Digital equalizer, noise filter, PLL and slicer
9397 750 13697
Objective data sheet
Rev. 01 — 20 June 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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