74AUP2G240 Datasheet, PDF (14/20 Pages) NXP Semiconductors – Low-power dual inverting buffer/line driver; 3-state

NXP Semiconductors
13. Package outline
74AUP2G240
Low-power dual inverting buffer/line driver; 3-state
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
y
Z
8
5
pin 1 index
E
c
HE
A ^A2
A1
1
e
4
bp
wM
detail X
A
X
vM A
Q
(A3)
θ
Lp
L
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D⁽¹⁾ E⁽²⁾
e
HE
mm
1
0.15
0.00
0.85
0.60
0.12
0.27
0.17
0.23
0.08
2.1
1.9
2.4
2.2
0.5
3.2
3.0
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
SOT765-1
REFERENCES
JEDEC
JEITA
MO-187
L
Lp
Q
v
w
y
Z⁽¹⁾
θ
0.4
0.40 0.21
0.15 0.19
0.2
0.13
0.1
0.4
0.1
8°
0°
EUROPEAN
PROJECTION
ISSUE DATE
02-06-07
Fig 10. Package outline SOT765-1 (VSSOP8)
74AUP2G240_4
Product data sheet
Rev. 04 — 30 June 2009
© NXP B.V. 2009. All rights reserved.
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