LPC4367JET100E Datasheet, PDF(133/156 Page) NXP Semiconductors – 32-bit ARM Cortex-M4/M0 MCU; up to 1 MB flash and 154 kB SRAM; Ethernet, two High-speed USB, LCD, EMC

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LPC4367JET100E Datasheet, PDF (133/156 Pages) NXP Semiconductors – 32-bit ARM Cortex-M4/M0 MCU; up to 1 MB flash and 154 kB SRAM; Ethernet, two High-speed USB, LCD, EMC

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NXP Semiconductors

12. ADC/DAC electrical characteristics

LPC436x

32-bit ARM Cortex-M4/M0 microcontroller

Table 39. ADC characteristics

VDDA(3V3) over specified ranges; Tamb = ï40 ï°C to +105 ï°C; unless otherwise specified.

Symbol Parameter

Conditions

Min Typ

VIA

Cia

EL(adj)

Rvsi

analog input voltage

analog input capacitance

differential linearity error

integral non-linearity

offset error

gain error

absolute error

voltage source interface

resistance

2.7 V ï£ VDDA(3V3) ï£ 3.6 V

2.4 V ï£ VDDA(3V3) < 2.7 V

2.7 V ï£ VDDA(3V3) ï£ 3.6 V

2.4 V ï£ VDDA(3V3) < 2.7 V

2.7 V ï£ VDDA(3V3) ï£ 3.6 V

2.4 V ï£ VDDA(3V3) < 2.7 V

2.7 V ï£ VDDA(3V3) ï£ 3.6 V

2.4 V ï£ VDDA(3V3) < 2.7 V

2.7 V ï£ VDDA(3V3) ï£ 3.6 V

2.4 V ï£ VDDA(3V3) < 2.7 V

see Figure 41

[1][2] -

[3] -

[4] -

[5] -

[6] -

ï±0.8

ï±1.0

ï±0.8

ï±1.5

ï±0.15

ï±0.3

ï±0.35

ï±3

ï±4

fclk(ADC)

input resistance

ADC clock frequency

sampling frequency

[7][8] -

10-bit resolution; 11 clock

cycles

2-bit resolution; 3 clock

cycles

Max

VDDA(3V3)

1/(7 ï´ fclk(ADC) ï´

Cia)

1.2

4.5

400

Unit

LSB

kï

Mï

MHz

kSamples/s

1.5

MSamples/s

[1] The ADC is monotonic, there are no missing codes.

[2] The differential linearity error (ED) is the difference between the actual step width and the ideal step width. See Figure 40.

[3] The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after

appropriate adjustment of gain and offset errors. See Figure 40.

[4] The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the

ideal curve. See Figure 40.

[5] The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset

error, and the straight line which fits the ideal transfer curve. See Figure 40.

[6] The absolute error (ET) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated

ADC and the ideal transfer curve. See Figure 40.

[7] Tamb = 25 ï°C.

[8] Input resistance Ri depends on the sampling frequency fs: Ri = 2 kï + 1 / (fs ï´ Cia).

LPC436X

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1.2 â 14 March 2016

133 of 156

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