74HC165 Datasheet, PDF (13/22 Pages) NXP Semiconductors – 8-bit parallel-in/serial-out shift register

NXP Semiconductors
74HC165; 74HCT165
8-bit parallel-in/serial out shift register
V_I
CP, CE input
GND
V_I
DS input
GND
(1)
V_M
t_h
t_su
V_M
t_su
t_h
t_su
V_I
CP, CE input
GND
t_W
V_M
mna990
The shaded areas indicate when the input is permitted to change for predictable output performance
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
(1) CE may change only from HIGH-to-LOW while CP is LOW, see Section 1.
Fig 10. The set-up and hold times from the serial data input (DS) to the clock (CP) and clock enable (CE) inputs,
from the clock enable input (CE) to the clock input (CP) and from the clock input (CP) to the
clock enable input (CE)
V_I
Dn input
GND
V_I
PL input
GND
V_M
t_su
t_h
V_M
V_M
t_su
t_h
V_M
mna991
Measurement points are given in Table 8.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Fig 11. The set-up and hold times from the data inputs (Dn) to the parallel load input (PL)
Table 8. Measurement points
Type
Input
V_I
74HC165
V_CC
74HCT165
3V
V_M
0.5V_CC
1.3 V
Output
V_M
0.5V_CC
1.3 V
74HC_HCT165_3
Product data sheet
Rev. 03 — 14 March 2008
© NXP B.V. 2008. All rights reserved.
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