PCF2123 Datasheet, PDF (11/54 Pages) NXP Semiconductors – SPI Real time clock/calendar

NXP Semiconductors
PCF2123
SPI Real time clock/calendar
9.3.2 Register Control_2
Table 6. Register Control_2 (address 01h) bits description
Bit Symbol
Value
Description
Reference
7
MI
0
minute interrupt is disabled
Section 9.8.1
1
minute interrupt is enabled
6
SI
0
second interrupt is disabled
1
second interrupt is enabled
5
MSF
0
no minute or second interrupt generated
1
flag set when minute or second interrupt
generated;
flag must be cleared to clear interrupt
when TI_IP = 0
4
TI_TP
0
interrupt pin follows timer flags
Section 9.9.2
1
interrupt pin generates a pulse
3
AF
0
no alarm interrupt generated
Section 9.7.1
1
flag set when alarm triggered;
flag must be cleared to clear interrupt
2
TF
0
no countdown timer interrupt generated -
1
flag set when countdown timer interrupt
generated;
flag must be cleared to clear interrupt
when TI_IP = 0
1
AIE
0
no interrupt generated from the alarm flag Section 9.9.3
1
interrupt generated when alarm flag set
0
TIE
0
no interrupt generated from the countdown Section 9.9.2
timer
1
interrupt generated by the countdown timer
9.4 OS flag
The PCF2123 includes a flag (bit OS) which is set whenever the oscillator is stopped (see
Figure 8 and Figure 9). The flag will remain set until cleared by software. If the flag cannot
be cleared, then the PCF2123 oscillator is not running. This method can be used to
monitor the oscillator and to determine if the supply voltage has reduced to the point
where oscillation fails.
V_DD
battery operation
main supply
V_OSC(MIN)
PCF2123_1
Product data sheet
Fig 8. OS set by failing V_DD
Rev. 01 — 19 November 2008
t
001aai561
© NXP B.V. 2008. All rights reserved.
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