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LPC2387_08 Datasheet, PDF (11/47 Pages) NXP Semiconductors – Single-chip 16-bit/32-bit microcontrollers; 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC | |||
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NXP Semiconductors
LPC2387
Fast communication chip
Table 3. Pin description â¦continued
Symbol
Pin
Type Description
P2[10]/EINT0
53[6]
I/O P2[10] â General purpose digital input/output pin.
Note: LOW on this pin while RESET is LOW forces on-chip bootloader to take over
control of the part after a reset.
I
EINT0 â External interrupt 0 input.
P2[11]/EINT1/
MCIDAT1/
I2STX_CLK
52[6]
I/O P2[11] â General purpose digital input/output pin.
I
EINT1 â External interrupt 1 input.
O
MCIDAT1 â Data line for SD/MMC interface.
I/O I2STX_CLK â Transmit Clock. It is driven by the master and received by the slave.
Corresponds to the signal SCK in the I2S-bus speciï¬cation.
P2[12]/EINT2/
MCIDAT2/
I2STX_WS
51[6]
I/O P2[12] â General purpose digital input/output pin.
I
EINT2 â External interrupt 2 input.
O
MCIDAT2 â Data line for SD/MMC interface.
I/O I2STX_WS â Transmit Word Select. It is driven by the master and received by the
slave. Corresponds to the signal WS in the I2S-bus speciï¬cation.
P2[13]/EINT3/
MCIDAT3/
I2STX_SDA
50[6]
I/O P2[13] â General purpose digital input/output pin.
I
EINT3 â External interrupt 3 input.
O
MCIDAT3 â Data line for SD/MMC interface.
I/O I2STX_SDA â Transmit data. It is driven by the transmitter and read by the
receiver. Corresponds to the signal SD in the I2S-bus speciï¬cation.
P3[0] to P3[31]
I/O Port 3: Port 3 is a 32-bit I/O port with individual direction controls for each bit. The
operation of port 3 pins depends upon the pin function selected via the Pin Connect
block. Pins 0 through 24, and 27 through 31 of this port are not available.
P3[25]/MAT0[0]/ 27[1]
PWM1[2]
I/O P3[25] â General purpose digital input/output pin.
O
MAT0[0] â Match output for Timer 0, channel 0.
O
PWM1[2] â Pulse Width Modulator 1, output 2.
P3[26]/MAT0[1]/ 26[1]
PWM1[3]
I/O P3[26] â General purpose digital input/output pin.
O
MAT0[1] â Match output for Timer 0, channel 1.
O
PWM1[3] â Pulse Width Modulator 1, output 3.
P4[0] to P4[31]
I/O Port 4: Port 4 is a 32-bit I/O port with individual direction controls for each bit. The
operation of port 4 pins depends upon the pin function selected via the Pin Connect
block. Pins 0 through 27, 30, and 31 of this port are not available.
P4[28]/MAT2[0]/ 82[1]
TXD3
I/O P4[28] â General purpose digital input/output pin.
O
MAT2[0] â Match output for Timer 2, channel 0.
O
TXD3 â Transmitter output for UART3.
P4[29]/MAT2[1]/ 85[1]
RXD3
I/O P4[29] â General purpose digital input/output pin.
O
MAT2[1] â Match output for Timer 2, channel 1.
I
RXD3 â Receiver input for UART3.
TDO
1[1]
O
TDO â Test Data Out for JTAG interface.
TDI
2[1]
I
TDI â Test Data In for JTAG interface.
TMS
3[1]
I
TMS â Test Mode Select for JTAG interface.
TRST
4[1]
I
TRST â Test Reset for JTAG interface.
TCK
5[1]
I
TCK â Test Clock for JTAG interface. This clock must be slower than 1â6 of the CPU
clock (CCLK) for the JTAG interface to operate.
LPC2387_2
Product data sheet
Rev. 02 â 1 February 2008
© NXP B.V. 2008. All rights reserved.
11 of 47
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