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| 74HC138BQ Datasheet, PDF (10/19 Pages) NXP Semiconductors – 3-to-8 line decoder/demultiplexer inverting | |||
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NXP Semiconductors
74HC138; 74HCT138
3-to-8 line decoder/demultiplexer; inverting
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Fig 8.
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Load circuitry for measuring switching times
Table 9. Test data
Type
Input
VI
tr, tf
74HC138
VCC
6 ns
74HCT138
3V
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 kΩ
1 kΩ
S1 position
tPHL, tPLH
open
open
tPZH, tPHZ
GND
GND
tPZL, tPLZ
VCC
VCC
74HC_HCT138
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 â 27 June 2012
© NXP B.V. 2012. All rights reserved.
10 of 19
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