74AUP2G34 Datasheet, PDF (10/16 Pages) NXP Semiconductors – Low-power dual buffer

NXP Semiconductors
74AUP2G34
Low-power dual buffer
V_CC
V_EXT
G
VI
VO
DUT
5 kΩ
RT
CL
RL
001aac521
Fig 8.
Test data is given in Table 10.
Definitions for test circuit:
R_L = Load resistance.
C_L = Load capacitance including jig and probe capacitance.
R_T = Termination resistance should be equal to the output impedance Z_o of the pulse generator.
V_EXT = External voltage for measuring switching times.
Load circuitry for switching times
Table 10. Test data
Supply voltage
V_CC
0.8 V to 3.6 V
Load
C_L
R_L[1]
5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ
V_EXT
t_PLH, t_PHL
open
t_PZH, t_PHZ
GND
t_PZL, t_PLZ
2 × V_CC
[1] For measuring enable and disable times R_L = 5 kΩ, for measuring propagation delays, setup and hold times and pulse width R_L = 1 MΩ.
74AUP2G34_2
Product data sheet
Rev. 02 — 31 January 2008
© NXP B.V. 2008. All rights reserved.
10 of 16