TZA3012HW Datasheet, PDF (1/18 Pages) NXP Semiconductors – 30 Mbit/s up to 3.2 Gbit/s A-Rate fiber-optic receiver

TZA3012HW
30 Mbit/s up to 3.2 Gbit/s A-Rate fiber-optic receiver
Rev. 01 — 15 December 2005
Product data sheet
1. General description
The TZA3012HW is a fully integrated optical network receiver containing a dual limiter,
data and clock recovery and demultiplexer with demultiplexing ratios of 1 : 16, 1 : 10, 1 : 8,
or 1 : 4.
The A-rate feature allows the IC to operate at any bit rate between 30 Mbit/s and
3.2 Gbit/s using a single reference frequency. The receiver supports loop modes with
serial clock and data inputs and outputs. All clock signals are generated using a fractional
N synthesizer with 10 Hz resolution giving a true, continuous rate operation. For full
configuration flexibility, the receiver can be configured by pin or via the I²C-bus.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
2. Features
2.1 General
s Single 3.3 V supply voltage
s I²C-bus and pin configured fiber-optic receiver
2.2 Dual limiter
s Dual limiting input with 12 mV sensitivity
s Received Signal Strength Indicator (RSSI)
s Loss-Of-Signal (LOS) indicator with threshold adjust
s Differential overvoltage protection
2.3 Data and clock recovery
s Supports SHD/SONET bit rates at 155.52 Mbit/s, 622.08 Mbit/s, 2488.32 Mbit/s and
2666.06 Mbit/s (STM16/OC48 + FEC)
s Supports Gigabit Ethernet at 1250 Mbit/s and 3125 Mbit/s
s Supports Fiber Channel at 1062.5 Mbit/s and 2125 Mbit/s
s ITU-T compliant jitter tolerance
s Frequency lock indicator
s Stable clock signal when input data absent
s Outputs for recovered data and clock loop mode