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TDA19978B Datasheet, PDF (1/38 Pages) NXP Semiconductors – Quad HDMI 1.3a receiver interface with equalizer (HDTV up to 1080p, up to UXGA for PC formats) | |||
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TDA19978B
Quad HDMI 1.3a receiver interface with equalizer (HDTV up to
1080p, up to UXGA for PC formats)
Rev. 02 â 10 May 2010
Product data sheet
1. General description
The TDA19978B is a four input HDMI 1.3a compliant receiver with embedded EDID
memory. The built-in auto-adaptive equalizer improves signal quality and allows the use of
cable lengths up to 25 m which are laboratory tested with a 0.5 mm (24 AWG) cable at
2.05 gigasamples per second. In addition, the TDA19978B is delivered with software
drivers to ease configuration and use.
The TDA19978B supports:
⢠TV resolutions:
â 480i (1440 Ã 480i at 60 Hz), 576i (1440 Ã 576i at 50 Hz) to HDTV (up to
1920 Ã 1080p at 50/60 Hz)
â WUXGA (1920 Ã 1200p at 60 Hz) reduced blanking format
⢠PC resolutions:
â VGA (640 Ã 480p at 60 Hz) to UXGA (1600 Ã 1200p at 60 Hz)
⢠Deep Color mode in 10-bit and 12-bit (up to 205 MHz TMDS clock)
⢠Gamut boundary description
⢠IEC 60958/IEC 61937, OBA (One Bit Audio), DST (Direct Stream Transfer) and HBR
(High Bit Rate) stream
The TDA19978B includes:
⢠An enhanced PC and TV format recognition system
⢠Generation of a 128/256/512 à fs system clock allowing the use of simple audio DACs
without an integrated PLL (such as the UDA1334BTS)
⢠An embedded oscillator (an external crystal can also be used)
⢠Improved audio clock generation using an external reference clock
⢠OBA (as used in SACD), DST and HBR stream support
The TDA19978B converts HDMI streams without HDCP into RGB or YCbCr digital
signals. The YCbCr digital output signal can be 4:4:4 or 4:2:2 semi-planar format based
on the ITU-R BT.601 standard or 4:2:2 based on the ITU-R BT.656 format. The device can
adjust the output timing of the video port by altering the values of tsu(Q) and th(Q). In
addition, all settings are controllable using the I2C-bus.
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