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PMN50XP Datasheet, PDF (1/11 Pages) NXP Semiconductors – P-channel TrenchMOS extremely low level FET
PMN50XP
P-channel TrenchMOS extremely low level FET
Rev. 02 — 2 October 2007
Product data sheet
1. Product profile
1.1 General description
Extremely low level P-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package. This product is designed and qualified for use in computing,
communications, consumer and industrial applications only.
1.2 Features
„ Low on-state losses
„ Low threshold voltage
1.3 Applications
„ Battery management
„ Load Switching
„ Battery powered portable equipment
„ Low power DC to DC converters
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
VDS
drain-source voltage
ID
drain current
Dynamic characteristics
QGD gate-drain charge
Static characteristics
RDSon drain-source on-state
resistance
Conditions
Tj ≥ 25 °C; Tj ≤ 150 °C
VGS = -4.5 V; Tsp = 25 °C;
see Figure 1 and 3
VGS = -4.5 V; ID = -4.7 A;
VDS = -10 V; Tj = 25 °C;
see Figure 9 and 10
VGS = -4.5 V; ID = -2.8 A;
Tj = 25 °C; see Figure 7 and 8
Min Typ Max Unit
-
-
-20 V
-
-
-4.8 A
-
1.3 -
nC
-
48 60 mΩ