PMK35EP Datasheet, PDF (1/12 Pages) NXP Semiconductors – P-channel TrenchMOS extremely low level FET

PMK35EP
P-channel TrenchMOS extremely low level FET
Rev. 02 — 29 April 2010
Product data sheet
1. Product profile
1.1 General description
Extremely low level P-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
 Low conduction losses due to low
on-state resistance
1.3 Applications
 Battery management
 Load switching
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter
Conditions
V_DS
drain-source
25 °C ≤ T_j ≤ 150 °C
voltage
I_D
drain current
T_sp = 25 °C; V_GS = -10 V; see
Figure 1; see Figure 3
P_tot
total power
T_sp = 25 °C; see Figure 2
dissipation
Static characteristics
R_DSon
drain-source
on-state
resistance
V_GS = -10 V; I_D = -9.2 A;
T_j = 25 °C; see Figure 9
Dynamic characteristics
Q_GD
gate-drain charge V_GS = -10 V; I_D = -9.2 A;
V_DS = -15 V; T_j = 25 °C;
see Figure 11; see Figure 12
Min Typ Max Unit
-
-
-30 V
-
-
-14. A
9
-
-
6.9 W
-
16 19 mΩ
-
6-
nC