PHKD13N03LT Datasheet, PDF (1/13 Pages) NXP Semiconductors – Dual TrenchMOS™ logic level FET

PHKD13N03LT
Dual N-channel TrenchMOS logic level FET
Rev. 03 — 27 April 2010
Product data sheet
1. Product profile
1.1 General description
Dual logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
„ Low conduction losses due to low
on-state resistance
„ Simple gate drive required due to low
gate charge
„ Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications
„ DC-to-DC convertors
„ Lithium-ion battery applications
„ Notebook computers
„ Portable equipment
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter
Conditions
V_DS
drain-source voltage T_j ≥ 25 °C; T_j ≤ 150 °C
I_D
drain current
T_sp = 25 °C; V_GS = 10 V;
[1]
see Figure 1; see Figure 3
P_tot
total power
dissipation
T_sp = 25 °C; see Figure 2
Static characteristics
R_DSon
drain-source on-state V_GS = 10 V; I_D = 8 A;
resistance
T_j = 25 °C; see Figure 9;
see Figure 10
Dynamic characteristics
Q_GD
gate-drain charge V_GS = 5 V; I_D = 5 A;
V_DS = 15 V; T_j = 25 °C;
see Figure 11
[1] Single device conducting.
Min Typ Max Unit
-
-
30 V
-
-
10.4 A
-
-
3.57 W
-
17 20 mΩ
-
3.9 -
nC