PHK28NQ03LT Datasheet, PDF (1/12 Pages) NXP Semiconductors – TrenchMOS logic level FET

PHK28NQ03LT
N-channel TrenchMOS logic level FET
Rev. 03 — 8 December 2009
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
„ Simple gate drive required due to low
gate charge
„ Suitable for logic level gate drive
sources
1.3 Applications
„ DC-to-DC convertors
„ Switched-mode power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
V_DS
drain-source voltage T_j ≥ 25 °C; T_j ≤ 150 °C
I_D
drain current
T_sp = 25 °C; V_GS = 10 V;
see Figure 1 and 3
P_tot
total power
dissipation
T_sp = 25 °C;
see Figure 2
Dynamic characteristics
Q_GD
gate-drain charge V_GS = 4.5 V; I_D = 14 A;
V_DS = 15 V; T_j = 25 °C;
see Figure 11
Static characteristics
R_DSon
drain-source
V_GS = 10 V; I_D = 14 A;
on-state resistance T_j = 25 °C; see Figure 9 and 10
Min Typ Max Unit
-
-
30 V
-
-
23.7 A
-
-
6.25 W
-
11.4 -
nC
-
5.5 6.5 mΩ