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PHK13N03LT Datasheet, PDF (1/12 Pages) NXP Semiconductors – TrenchMOS logic level FET
PHK13N03LT
N-channel TrenchMOS logic level FET
Rev. 02 — 17 March 2009
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
„ Low conduction losses due to low
on-state resistance
„ Simple gate drive required due to low
gate charge
„ Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications
„ DC-to-DC convertors
„ Lithium-ion battery applications
„ Notebook computers
„ Portable equipment
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
VDS
drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C
ID
drain current
Tsp = 25 °C; VGS = 10 V;
see Figure 1; see Figure 3
Ptot
total power
dissipation
Tsp = 25 °C; see Figure 2
Dynamic characteristics
QGD
gate-drain charge VGS = 5 V; ID = 8 A;
VDS = 15 V; Tj = 25 °C;
see Figure 11
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 10 V; ID = 8 A;
Tj = 25 °C; see Figure 9;
see Figure 10
Min Typ Max Unit
-
-
30 V
-
-
13.8 A
-
-
6.25 W
-
3.9 -
nC
-
17 20 mΩ