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PHD36N03LT Datasheet, PDF (1/13 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET | |||
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PHD36N03LT
N-channel TrenchMOS logic level FET
Rev. 03 â 29 March 2010
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
 Simple gate drive required due to low
gate charge
 Suitable for logic level gate drive
sources
1.3 Applications
 DC-to-DC convertors
 Switched-mode power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
Min Typ Max Unit
VDS
drain-source voltage Tj ⥠25 °C; Tj ⤠175 °C
ID
drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1 and 3
-
-
30 V
-
-
43.4 A
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
57.6 W
Dynamic characteristics
QGD
gate-drain charge VGS = 10 V; ID = 36 A;
VDS = 15 V; Tj = 25 °C;
see Figure 11 and 12
-
2.9 -
nC
Static characteristics
RDSon drain-source
VGS = 10 V; ID = 25 A; Tj = 25 °C; -
on-state resistance see Figure 9 and 10
14 17 mâ¦
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