PHB32N06LT Datasheet, PDF (1/11 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

PHB32N06LT
N-channel TrenchMOS logic level FET
Rev. 02 — 30 November 2009
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
„ Suitable for logic level gate drive
sources
1.3 Applications
„ General purpose switching
„ Switched-mode power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
V_DS
drain-source voltage T_j ≥ 25 °C; T_j ≤ 175 °C
I_D
drain current
T_mb = 25 °C; V_GS = 5 V;
see Figure 1 and 3
P_tot
total power
dissipation
T_mb = 25 °C;
see Figure 2
Dynamic characteristics
Q_GD
gate-drain charge V_GS = 5 V; I_D = 20 A;
V_DS = 44 V; T_j = 25 °C;
see Figure 11
Static characteristics
R_DSon
drain-source
on-state resistance
V_GS = 4.5 V; I_D = 20 A;
T_j = 25 °C
V_GS = 5 V; I_D = 20 A;
T_j = 25 °C;
see Figure 9 and 10
Min Typ Max Unit
-
-
60 V
-
-
34 A
-
-
97 W
-
8.5 -
nC
-
31.5 43 mΩ
-
30 40 mΩ