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PH6030L Datasheet, PDF (1/12 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET | |||
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PH6030L
N-channel TrenchMOS logic level FET
Rev. 01 â 29 July 2008
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology.
1.2 Features and benefits
 Lead-free package
 Logic level compatibile
 Optimized for use in DC-to-DC
converters
 Very low switching and conduction
losses
1.3 Applications
 DC-to-DC convertors
 Notebook computers
 Switched-mode power supplies
 Voltage regulators
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
VDS
drain-source voltage Tj ⥠25 °C; Tj ⤠150 °C
ID
drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1; see Figure 3
Dynamic characteristics
QGD
gate-drain charge VGS = 4.5 V; ID = 25 A;
VDS = 12 V; see Figure 11;
see Figure 12
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 10 V; ID = 25 A;
Tj = 25 °C; see Figure 9; see
Figure 10
Min Typ Max Unit
-
-
30 V
-
-
76.7 A
-
3.1 -
nC
-
4.7 6
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