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PH20100S Datasheet, PDF (1/12 Pages) NXP Semiconductors – N-channel TrenchMOS standard level FET
PH20100S
N-channel TrenchMOS standard level FET
Rev. 03 — 2 February 2009
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
„ Higher operating power due to low
thermal resistance
„ Low conduction losses due to low
on-state resistance
„ Simple gate drive required due to low
gate charge current
1.3 Applications
„ DC-to-DC convertors
„ Switched-mode power supplies
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
VDS
drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C
ID
drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 2; see Figure 1
Ptot
total power
dissipation
Tmb = 25 °C
Dynamic characteristics
QGD
gate-drain charge VGS = 10 V; ID = 20 A;
VDS = 50 V; Tj = 25 °C;
see Figure 11
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 10 V; ID = 10 A;
Tj = 25 °C; see Figure 8;
see Figure 9
Min Typ Max Unit
-
-
100 V
-
-
34.3 A
-
-
62.5 W
-
8.9 -
nC
-
19 23 mΩ