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PH1955L Datasheet, PDF (1/12 Pages) NXP Semiconductors – Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. | |||
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PH1955L
N-channel TrenchMOS logic level FET
Rev. 02 â 25 February 2009
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
 Low conduction losses due to low
on-state resistance
 Suitable for logic level gate drive
sources
 Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
 12 V and 24 V loads
 DC-to-DC convertors
 General purpose power switching
 Motors, lamps and solenoids
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
VDS
drain-source voltage Tj ⥠25 °C; Tj ⤠175 °C
ID
drain current
Tmb = 25 °C; VGS = 5 V;
see Figure 1; see Figure 3
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
Dynamic characteristics
QGD
gate-drain charge VGS = 5 V; ID = 25 A;
VDS = 44 V; Tj = 25 °C;
see Figure 9
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 10 V; ID = 25 A;
Tj = 25 °C; see Figure 7;
see Figure 8
Min Typ Max Unit
-
-
55 V
-
-
40 A
-
-
75 W
-
8
-
nC
-
14.3 17.3 mâ¦
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