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PCA9555A Datasheet, PDF (1/39 Pages) NXP Semiconductors – Low-voltage 16-bit I2C-bus I/O port with interrupt and weak pull-up
PCA9555A
Low-voltage 16-bit I2C-bus I/O port with interrupt and
weak pull-up
Rev. 1 — 11 September 2012
Product data sheet
1. General description
The PCA9555A is a low-voltage 16-bit General Purpose Input/Output (GPIO) expander
with interrupt and weak pull-up resistors for I2C-bus/SMBus applications. NXP I/O
expanders provide a simple solution when additional I/Os are needed while keeping
interconnections to a minimum, for example, in ACPI power switches, sensors, push
buttons, LEDs, fan control, etc.
In addition to providing a flexible set of GPIOs, the wide VDD range of 1.65 V to 5.5 V
allows the PCA9555A to interface with next-generation microprocessors and
microcontrollers where supply levels are dropping down to conserve power.
The PCA9555A contains the PCA9555 register set of four pairs of 8-bit Configuration,
Input, Output, and Polarity Inversion registers.
The PCA9555A is a pin-to-pin replacement to the PCA9555 and other industry-standard
devices. A more fully featured device, the PCAL9555A, is available with Agile I/O
features. See the respective data sheet for more details.
The PCA9555A open-drain interrupt (INT) output is activated when any input state differs
from its corresponding Input Port register state and is used to indicate to the system
master that an input state has changed.
INT can be connected to the interrupt input of a microcontroller. By sending an interrupt
signal on this line, the remote I/O can inform the microcontroller if there is incoming data
on its ports without having to communicate via the I2C-bus. Thus, the PCA9555A can
remain a simple slave device.
The device outputs have 25 mA sink capabilities for directly driving LEDs while consuming
low device current.
The power-on reset sets the registers to their default values and initializes the device state
machine.
All input/output pins have weak pull-up resistors connected to them to eliminate external
components.
Three hardware pins (A0, A1, A2) select the fixed I2C-bus address and allow up to eight
devices to share the same I2C-bus/SMBus.