PCA9538A Datasheet, PDF (1/37 Pages) NXP Semiconductors – Low-voltage 8-bit I2C-bus I/O port with interrupt and reset

PCA9538A
Low-voltage 8-bit I²C-bus I/O port with interrupt and reset
Rev. 1 — 28 September 2012
Product data sheet
1. General description
The PCA9538A is a low-voltage 8-bit General Purpose Input/Output (GPIO) expander
with interrupt and reset for I²C-bus/SMBus applications. NXP I/O expanders provide a
simple solution when additional I/Os are needed while keeping interconnections to a
minimum, for example, in ACPI power switches, sensors, push buttons, LEDs, fan control,
etc.
In addition to providing a flexible set of GPIOs, the wide V_DD range of 1.65 V to 5.5 V
allows the PCA9538A to interface with next-generation microprocessors and
microcontrollers where supply levels are dropping down to conserve power.
The PCA9538A contains the PCA9538A register set of four 8-bit Configuration, Input,
Output, and Polarity Inversion registers.
The PCA9538A is a pin-to-pin replacement for the PCA9538 and other industry-standard
devices. A more fully functional device, the PCAL9538A, is available with Agile I/O
features. See the respective data sheet for more details.
The PCA9538A open-drain interrupt (INT) output is activated when any input state differs
from its corresponding Input Port register state and is used to indicate to the system
master that an input state has changed.
INT can be connected to the interrupt input of a microcontroller. By sending an interrupt
signal on this line, the remote I/O can inform the microcontroller if there is incoming data
on its ports without having to communicate via the I²C-bus. Thus, the PCA9538A can
remain a simple slave device.
The device outputs have 25 mA sink capabilities for directly driving LEDs while consuming
low device current.
The power-on reset sets the registers to their default values and initializes the device state
machine. In the PCA9538A, the RESET pin causes the same reset/default I/O input
configuration to occur without de-powering the device, holding the registers and I²C-bus
state machine in their default state until the RESET input is once again HIGH. This input
requires a pull-up to V_DD.
Two hardware pins (A0, A1) select the fixed I²C-bus address and allow up to four devices
to share the same I²C-bus/SMBus.