PCA24S08A Datasheet, PDF (1/24 Pages) NXP Semiconductors – 1024 x 8-bit CMOS EEPROM with access protection

PCA24S08A
1024 × 8-bit CMOS EEPROM with access protection
Rev. 01 — 19 January 2010
Product data sheet
1. General description
The PCA24S08A provides 8192 bits of serial Electrically Erasable and Programmable
Read-Only Memory (EEPROM) organized as 1024 words of 8 bits each. Data bytes are
received and transmitted via the serial I²C-bus.
Access permissions limiting reads or writes are set via the I²C-bus to isolate blocks of
memory from improper access.
The PCA24S08A is intended to be pin compatible with standard 24C08 serial EEPROM
devices except for pins 1, 2, and 3, which are address pins in the standard part. Other
exceptions to the PCA24S08A serial EEPROM data sheet are noted in Section 6.6.
All bits are sent to or read from the device, most significant bit first, in a manner consistent
with the 24C08 serial EEPROM. The bit fields in this document are correspondingly listed
with the MSB on the left and the LSB on the right.
The EEPROM memory is broken up into 8 blocks of 1 kbit (128 bytes) each. Within each
block, the memory is physically organized in to 8 pages of 128 bits (16 bytes) each. In
addition to these 8 kbits, there are two more 128-bit pages that are used to store the
access protection and ID information. There are a total of 8448 bits of EEPROM memory
available in the PCA24S08A.
Access protection (both read and write) is organized on a block basis for block 1 through
block 7 and on a page and a block basis for block 0. Protection information for these
blocks and pages is stored in one of the additional pages of EEPROM memory that is
addressed separately from the main data storage array. SeeSection 6.4 for more details.
The ID value is located in the ID page of the EEPROM, the second of the additional
16 byte pages.
Writes from the serial interface may include from one byte to 16 bytes at a time,
depending on the protocol followed by the bus master. All page accesses must be
properly aligned to the internal EEPROM page.
The EEPROM memory offers an endurance of 100,000 write cycles per byte, with 10 year
data retention. Writes to the EEPROM take less than 5 ms to complete.
After manufacturing, all EEPROM bits will be set to a value of ‘1’.