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P89LPC952 Datasheet, PDF (1/69 Pages) NXP Semiconductors – 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 10-bit ADC | |||
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P89LPC952/954
8-bit microcontroller with accelerated two-clock 80C51 core
8 kB/16 kB 3 V byte-erasable ï¬ash with 10-bit ADC
Rev. 04 â 24 July 2008
Product data sheet
1. General description
The P89LPC952/954 is a single-chip microcontroller, available in low cost packages,
based on a high performance processor architecture that executes instructions in two to
four clocks, six times the rate of standard 80C51 devices. Many system-level functions
have been incorporated into the P89LPC952/954 in order to reduce component count,
board space, and system cost.
2. Features
2.1 Principal features
I 8 kB/16 kB byte-erasable ï¬ash code memory organized into 1 kB sectors and 64-byte
pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
I 256-byte RAM data memory and a 256-byte auxiliary on-chip RAM.
I 8-input multiplexed 10-bit ADC with window comparator that can generate an interrupt
for in or out of range results. Two analog comparators with selectable inputs and
reference source.
I Two 16-bit counter/timers (each may be conï¬gured to toggle a port output upon timer
overï¬ow or to become a PWM output) and a 23-bit system timer that can also be used
as a RTC.
I Two enhanced UARTs with a fractional baud rate generator, break detect, framing
error detection, and automatic address detection; 400 kHz byte-wide I2C-bus
communication port and SPI communication port.
I High-accuracy internal RC oscillator option, with clock doubler option, allows operation
without external oscillator components. The RC oscillator option is selectable and ï¬ne
tunable. Fast switching between the internal RC oscillator and any oscillator source
provides optimal support of minimal power active mode with fast switching to
maximum performance.
I 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
I 44-pin and 48-pin packages with 40 and 42 I/O pins minimum while using on-chip
oscillator and reset options.
I Port 5 has high current sourcing/sinking (20 mA) for all Port 5 pins. All other port pins
have high sinking capability (20 mA). A maximum limit is speciï¬ed for the entire chip.
I Watchdog timer with separate on-chip oscillator, requiring no external components.
The watchdog prescaler is selectable from eight values.
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