P89LPC9102 Datasheet, PDF(1/61 Page) NXP Semiconductors – 8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable flash with 8-bit A/D converter

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P89LPC9102 Datasheet, PDF (1/61 Pages) NXP Semiconductors – 8-bit microcontrollers with two-clock accelerated 80C51 core 1 kB 3 V byte-erasable flash with 8-bit A/D converter

P89LPC9102/9103/9107

8-bit microcontrollers with two-clock accelerated 80C51 core

1 kB 3 V byte-erasable ï¬ash with 8-bit A/D converter

Rev. 03 â 10 July 2007

Product data sheet

1. General description

The P89LPC9102/9103/9107 are single-chip microcontrollers in low-cost 10-pin and

14-pin packages based on a high performance processor architecture that executes

instructions in two to four clocks, six times the rate of standard 80C51 devices. Many

system-level functions have been incorporated into the P89LPC9102/9103/9107 in order

to reduce component count, board space, and system cost.

2. Features

2.1 Principal features

I 1 kB byte-erasable ï¬ash code memory organized into 256-byte sectors and 16-byte

pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.

I 128-byte RAM data memory.

I Two 16-bit timer/counters (P89LPC9102/9107). Two 16-bit timers (P89LPC9103)

I 23-bit system timer that can also be used as a RTC.

I Four input multiplexed 8-bit A/D converter/single DAC output. One analog comparator

with selectable reference.

I Enhanced UART with fractional baud rate generator, break detect, framing error

detection, automatic address detection and versatile interrupt capabilities

(P89LPC9103/9107).

I High-accuracy internal RC oscillator option, factory calibrated to 1 %, allows operation

without external oscillator components. The RC oscillator option is selectable and ï¬ne

tunable.

I VDD operating range of 2.4 V to 3.6 V with 5 V tolerant I/O pins (may be pulled up or

driven to 5.5 V).

I Up to 10 (P89LPC9107) or eight (P89LPC9102/9103) I/O pins when using internal

oscillator and reset options.

I Ultra-small 10-pin HVSON package (P89LPC9102/9103). 14-pin TSSOP and DIP

packages (P89LPC9107).

2.2 Additional features

I A high performance 80C51 CPU provides instruction cycle times of 136 ns to 272 ns

for all instructions except multiply and divide when using the internal 7.3728 MHz RC

oscillator in clock doubling mode (111 ns to 222 ns when using an external 18 MHz

clock). A lower clock frequency for the same performance results in power savings and

reduced EMI.

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