NE564 Datasheet, PDF (1/9 Pages) List of Unclassifed Manufacturers – LINEAR INTEGRATED CIRCUITS

Philips Semiconductors
Phase-locked loop
Product specification
NE/SE564
DESCRIPTION
The NE/SE564 is a versatile, high guaranteed frequency
phase-locked loop designed for operation up to 50MHz. As shown
in the Block Diagram, the NE/SE564 consists of a VCO, limiter,
phase comparator, and post detection processor.
FEATURES
• Operation with single 5V supply
• TTL-compatible inputs and outputs
• Guaranteed operation to 50MHz
• External loop gain control
• Reduced carrier feedthrough
• No elaborate filtering needed in FSK applications
• Can be used as a modulator
• Variable loop gain (externally controlled)
APPLICATIONS
• High speed modems
• FSK receivers and transmitters
• Frequency Synthesizers
ORDERING INFORMATION
DESCRIPTION
16-Pin Plastic Small Outline (SO) Package
16-Pin Plastic Dual In-Line Package (DIP)
16-Pin Plastic Dual In-Line Package (DIP)
PIN CONFIGURATIONS
D, N Packages
V+ ¹
LOOP GAIN CONTROL 2
INPUT TO PHASE COMP ₃
FROM VCO
LOOP FILTER ⁴
LOOP FILTER 5
FM/RF INPUT ⁶
BIAS FILTER ⁷
GND 8
16 _{TTL OUTPUT}
15 HYSTERESIS SET
14 ANALOG OUT
13 FREQ. SET CAP
12 FREQ. SET CAP
11 _{VCO OUT 2}
10 _V+
9 VCO OUT TTL
TOP VIEW
Figure 1. Pin Configuration
• Signal generators
• Various satcom/TV systems
• pin configuration
SR01025
TEMPERATURE RANGE
0 to +70°C
0 to +70°C
-55 to +125°C
ORDER CODE
NE564D
NE564N
SE564N
DWG #
SOT109-1
SOT38-4
SOT38-4
BLOCK DIAGRAM
V₊
4
5
1
14
LIMITER
6
PHASE
2
COMPARATOR
DC
3
7
RETRIEVER
11
AMPLIFIER
SCHMITT
TRIGGER
16
9
VCO
10
POST DETECTION
PROCESSOR
15
12
13
8
Figure 2. Block Diagram
SR01026
1994 Aug 31
1
853-0908 13720