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| HEF4051BT-653 Datasheet, PDF (1/23 Pages) NXP Semiconductors – 8-channel analog multiplexer/demultiplexer | |||
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HEF4051B
8-channel analog multiplexer/demultiplexer
Rev. 10 â 17 November 2011
Product data sheet
1. General description
The HEF4051B is an 8-channel analog multiplexer/demultiplexer with three address
inputs (S1 to S3), an active LOW enable input (E), eight independent inputs/outputs
(Y0 to Y7) and a common input/output (Z). The device contains eight bidirectional analog
switches, each with one side connected to an independent input/output (Y0 to Y7) and the
other side connected to a common input/output (Z). With E LOW, one of the eight
switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches
are in the high-impedance OFF-state, independent of S1 to S3. If break before make is
needed, then it is necessary to use the enable input.
VDD and VSS are the supply voltage connections for the digital control inputs (S1 to S3,
and E). The VDD to VSS range is 3 V to 15 V. The analog inputs/outputs (Y0 to Y7, and Z)
can swing between VDD as a positive limit and VEE as a negative limit. VDD ï VEE may not
exceed 15 V. Unused inputs must be connected to VDD, VSS, or another input. For
operation as a digital multiplexer/demultiplexer, VEE is connected to VSS (typically
ground). VEE and VSS are the supply voltage connections for the switches.
2. Features and benefits
ï® Fully static operation
ï® 5 V, 10 V, and 15 V parametric ratings
ï® Standardized symmetrical output characteristics
ï® Specified from ï40 ï°C to +85 ï°C and ï40 ï°C to +125 ï°C
ï® Complies with JEDEC standard JESD 13-B
3. Applications
ï® Analog multiplexing and demultiplexing
ï® Digital multiplexing and demultiplexing
ï® Signal gating
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