HEF4017B Datasheet, PDF (1/16 Pages) NXP Semiconductors – 5-stage Johnson counter

HEF4017B
5-stage Johnson decade counter
Rev. 04 — 9 December 2008
Product data sheet
1. General description
The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active
HIGH outputs (Q0 to Q9), an active LOW carry output from the most significant flip-flop
(Q5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding
asynchronous master reset input (MR).
The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or
a HIGH-to-LOW transition at CP1 while CP0 is HIGH (see Table 3).
When cascading counters, the Q5-9 output, which is LOW while the counter is in states 5,
6, 7, 8, and 9, can be used to drive the CP0 input of the next counter. A HIGH on MR
resets the counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock
inputs (CP0, CP1).
Automatic counter code correction is provided by an internal circuit: following any illegal
code the counter returns to a proper counting mode within 11 clock pulses.
Schmitt trigger action makes the clock inputs highly tolerant of slower rise and fall times.
It operates over a recommended V_DD power supply range of 3 V to 15 V referenced to V_SS
(usually ground). Unused inputs must be connected to V_DD, V_SS, or another input. It is
also suitable for use over both the industrial (−40 °C to +85 °C) and automotive (−40 °C to
+125 °C) temperature ranges.
2. Features
I Automatic counter correction
I Tolerant of slow clock rise and fall times
I Fully static operation
I 5 V, 10 V, and 15 V parametric ratings
I Standardized symmetrical output characteristics
I Operates across the automotive temperature range −40 °C to +125 °C
I Complies with JEDEC standard JESD 13-B
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
3. Applications
I Industrial and automotive