HEF4013BT-653 Datasheet, PDF (1/16 Pages) NXP Semiconductors – Tolerant of slow clock rise and fall times

HEF4013B
Dual D-type flip-flop
Rev. 8 — 21 November 2011
Product data sheet
1. General description
The HEF4013B is a dual D-type flip-flop that features independent set-direct input (SD),
clear-direct input (CD), clock input (CP) and outputs (Q, Q). Data is accepted when CP is
LOW and is transferred to the output on the positive-going edge of the clock. The active
HIGH asynchronous CD and SD inputs are independent and override the D or CP inputs.
The outputs are buffered for best system performance. The clock input’s Schmitt-trigger
action makes the circuit highly tolerant of slower clock rise and fall times.
It operates over a recommended V_DD power supply range of 3 V to 15 V referenced to V_SS
(usually ground). Unused inputs must be connected to V_DD, V_SS, or another input.
2. Features and benefits
 Tolerant of slow clock rise and fall times
 Fully static operation
 5 V, 10 V, and 15 V parametric ratings
 Standardized symmetrical output characteristics
 Specified from 40 C to +125 C
 Complies with JEDEC standard JESD 13-B
3. Applications
 Counters and dividers
 Registers
 Toggle flip-flops
4. Ordering information
Table 1. Ordering information
All types operate from 40 C to +125 C
Type number
Package
Name
Description
HEF4013BP
DIP14
plastic dual in-line package; 14 leads (300 mil)
HEF4013BT
SO14
plastic small outline package; 14 leads; body width 3.9 mm
HEF4013BTT
TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm
Version
SOT27-1
SOT108-1
SOT402-1