HEF4011BT-653 Datasheet, PDF(1/12 Page) NXP Semiconductors – Inputs and outputs are protected against electrostatic effects

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HEF4011BT-653 Datasheet, PDF (1/12 Pages) NXP Semiconductors – Inputs and outputs are protected against electrostatic effects

HEF4011B

Quad 2-input NAND gate

Rev. 5 â 21 November 2011

Product data sheet

1. General description

The HEF4011B is a quad 2-input NAND gate. The outputs are fully buffered for the

highest noise immunity and pattern insensitivity to output impedance.

It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS

(usually ground). Unused inputs must be connected to VDD, VSS, or another input.

2. Features and benefits

ï® Fully static operation

ï® 5 V, 10 V, and 15 V parametric ratings

ï® Standardized symmetrical output characteristics

ï® Specified from ï40 ï°C to +125 ï°C

ï® Complies with JEDEC standard JESD 13-B

ï® Inputs and outputs are protected against electrostatic effects

3. Ordering information

Table 1. Ordering information

All types operate from ï40 ï°C to +125 ï°C

Type number Package

Name Description

HEF4011BP DIP14 plastic dual in-line package; 14 leads (300 mil)

HEF4011BT SO14 plastic small outline package; 14 leads; body width 3.9 mm

4. Functional diagram

Version

SOT27-1

SOT108-1

1A 1

1B 2

2A 5

2B 6

3A 8

3B 9

4A 12

4B 13

3 1Y

4 2Y

10 3Y

11 4Y

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Fig 1. Functional diagram

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Fig 2. Logic diagram (one gate)

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