DAC1408D650W2 Datasheet, PDF (1/3 Pages) NXP Semiconductors – SW interface to easily program DAC parameters

The HSDC‐JAKIT1W2/DB is an ADC/DAC loop back demo based on the ECP3 FPGA from Lattice
Semiconductors. The kit consists of two high speed converter demos from NXP: DAC1408D650W2/DB
and ADC1413D080W2/DB demos.
The DAC1408D650W2/DB is a 14bit dual channel, 2x, 4x and 8x interpolating DAC demonstration board
equipped with JESD204A interface and suitable for dynamic performance evaluation from low to high
output frequency signals sampling up to 650Msps. This demo board features Lattice Semiconductors’
ECP3 FPGA and can be used for functional demonstration, as well as JESD204A interoperability testing
and verification between the DAC1408D650 and the ECP3 FPGA.
The ADC1413D080W2/DB is a 14bit dual channel ADC demonstration board equipped with on board
Lattice ECP3-70 FPGA and JESD204A interface. This demonstration board enables one channel ADC
dynamic performance evaluation for analog input frequencies up to 30 MHz and sample clock frequencies
from 65Msps to 80Msps.
Key Features for the DAC demo:
• SW interface to easily program DAC parameters (NCO, Offset, interpolation factor, PLL…) and
download waveforms to ECP3 FPGA
• SMA connector for DAC external clock input signal
• On board clock generator for DAC and FPGA
• On Board ECP3 FPGA enabling data generation:
o Single/ multi Tone for SFDR evaluation
o Test pattern generation for ACLR measurements ( 2/4 carriers WCDMA, TDSCDMA,
GSM‐MC ... Etc )
• USB Powered – no external supply required
Key Features for the ADC demo:
• USB-powered demonstration board
• 60 MHz on Board Oscillator for ADC sample clock
• Optional external ADC sample clock ( via SMA connector ) 65MHz to 80MHz
• Access to one ADC channel
Demo box content:
• Demo Kit
• USB cables
• CDROM (LabVIEW user software, datasheets, PCB layout/schematics, drivers, Quick Start Guide)