BUK9MPP-55PRR Datasheet, PDF (1/15 Pages) NXP Semiconductors – Dual TrenchPLUS logic level FET

BUK9MPP-55PRR
Dual TrenchPLUS logic level FET
Rev. 01 — 14 May 2009
Product data sheet
1. Product profile
1.1 General description
Dual N-channel enhancement mode field-effect power transistor in SO20. Device is
manufactured using NXP High-Performance (HPA) TrenchPLUS technology, featuring
very low on-state resistance, integrated current sensing transistors and over temperature
protection diodes.
1.2 Features and benefits
„ Integrated current sensor
„ Integrated temperature sensor
1.3 Applications
„ Lamp switching
„ Motor drive systems
„ Power distribution
„ Solenoid drivers
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
Static characteristics, FET1 and FET2
R_DSon
drain-source
on-state resistance
V_GS = 5 V; I_D = 5 A;
T_j = 25 °C; see Figure 16;
see Figure 17
I_D/I_sense ratio of drain current T_j = 25 °C; V_GS = 5 V; see
to sense current
Figure 18
V_(BR)DSS drain-source
T_j = 25 °C; V_GS = 0 V;
breakdown voltage I_D = 250 µA
Min Typ Max Unit
-
21.3 25 mΩ
5130 5700 6270 A/A
55 -
-
V