BUK9MGP-55PTS Datasheet, PDF (1/20 Pages) NXP Semiconductors – Dual TrenchPLUS logic level FET

BUK9MGP-55PTS
Dual TrenchPLUS logic level FET
Rev. 01 — 14 May 2009
Product data sheet
1. Product profile
1.1 General description
Dual N-channel enhancement mode field-effect power transistor in SO20. Device is
manufactured using NXP High-Performance (HPA) TrenchPLUS technology, featuring
very low on-state resistance, integrated current sensing transistors and over temperature
protection diodes.
1.2 Features and benefits
„ Integrated current sensors
„ Integrated temperature sensors
1.3 Applications
„ Lamp switching
„ Motor drive systems
„ Power distribution
„ Solenoid drivers
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
Static characteristics, FET1
R_DSon
drain-source
on-state resistance
V_GS = 5 V; I_D = 10 A;
T_j = 25 °C; see Figure 23;
see Figure 25
I_D/I_sense ratio of drain current T_j = 25 °C; V_GS = 5 V; see
to sense current
Figure 27
V_(BR)DSS drain-source
breakdown voltage
Static characteristics, FET2
V_GS = 0 V; I_D = 250 µA;
T_j = 25 °C
R_DSon
drain-source
on-state resistance
V_GS = 5 V; I_D = 5 A;
T_j = 25 °C; see Figure 24;
see Figure 26
I_D/I_sense ratio of drain current T_j = 25 °C; V_GS = 5 V; see
to sense current
Figure 28
V_(BR)DSS drain-source
V_GS = 0 V; I_D = 250 µA;
breakdown voltage T_j = 25 °C
Min Typ Max Unit
-
8.6 10 mΩ
8100 9000 9900 A/A
55 -
-
V
-
21.3 25 mΩ
5910 6570 7227 A/A
55 -
-
V