BUK9K18-40E Datasheet, PDF (1/13 Pages) NXP Semiconductors – Dual N-channel TrenchMOS logic level FET

BUK9K18-40E
Dual N-channel TrenchMOS logic level FET
23 April 2013
Product data sheet
1. General description
Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS
technology. This product has been designed and qualified to AEC Q101 standard for use
in high performance automotive applications.
2. Features and benefits
• Q101 compliant
• Repetitive avalanche rated
• Suitable for thermally demanding environments due to 175 °C rating
• True logic level gate with V_GS(th) > 0.5 V @ 175 °C
3. Applications
• 12 V Automotive systems
• Motors, lamps and solenoid control
• Start-stop micro-hybrid applications
• Transmission control
• Ultra high performance power switching
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
V_DS
drain-source voltage T_j ≥ 25 °C; T_j ≤ 175 °C
I_D
drain current
V_GS = 5 V; T_mb = 25 °C; Fig. 1
P_tot
total power dissipation T_mb = 25 °C; Fig. 2
Static characteristics FET1 and FET2
R_DSon
drain-source on-state V_GS = 5 V; I_D = 10 A; T_j = 25 °C; Fig. 12
resistance
Dynamic characteristics FET1 and FET2
Q_GD
gate-drain charge
I_D = 10 A; V_DS = 32 V; V_GS = 10 V;
T_j = 25 °C; Fig. 14
Min Typ Max Unit
-
-
40
V
-
-
30
A
-
-
38
W
-
17.1 19.5 mΩ
-
3
-
nC
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