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| 74LVC07APW-T Datasheet, PDF (1/14 Pages) NXP Semiconductors – Hex buffer with open-drain outputs | |||
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74LVC07A
Hex buffer with open-drain outputs
Rev. 5 â 27 October 2011
Product data sheet
1. General description
The 74LVC07A provides six non-inverting buffers. The outputs are open-drain and can be
connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH
wired-AND functions.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and 5 V applications.
2. Features and benefits
ï® 5 V tolerant inputs and outputs (open-drain) for interfacing with 5 V logic
ï® Wide supply voltage range from 1.2 V to 5.5 V
ï® CMOS low power consumption
ï® Direct interface with TTL levels
ï® Inputs accept voltages up to 5 V
ï® Complies with JEDEC standard:
ïµ JESD8-7A (1.65 V to 1.95 V)
ïµ JESD8-5A (2.3 V to 2.7 V)
ïµ JESD8-C/JESD36 (2.7 V to 3.6 V)
ï® ESD protection:
ïµ HBM JESD22-A114F exceeds 2000 V
ïµ MM JESD22-A115-B exceeds 200 V
ïµ CDM JESD22-C101E exceeds 1000 V
ï® Specified from ï40 ï°C to +85 ï°C and ï40 ï°C to +125 ï°C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74LVC07AD ï40 ï°C to +125 ï°C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
74LVC07APW ï40 ï°C to +125 ï°C TSSOP14 plastic thin small outline package; 14 leads;
body width 4.4 mm
74LVC07ABQ ï40 ï°C to +125 ï°C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 ï´ 3 ï´ 0.85 mm
Version
SOT108-1
SOT402-1
SOT762-1
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