74LV259 Datasheet, PDF (1/19 Pages) NXP Semiconductors – 8-bit addressable latch

74LV259
8-bit addressable latch
Rev. 03 — 2 January 2008
Product data sheet
1. General description
The 74LV259 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC259 and 74HCT259. The 74LV259 is a high-speed 8-bit addressable latch
designed for general purpose storage applications in digital systems. The 74LV259 is
multifunctional device capable of storing single-line data in eight addressable latches, and
also 3-to-8 decoder and demultiplexer, with active HIGH outputs (Q0 to Q7), functions are
available. The 74LV259 also incorporates an active LOW common reset (MR) for resetting
all latches, as well as, an active LOW enable input (LE).
The 74LV259 has four modes of operation as shown in the mode select table. In the
addressable latch mode, data on the data line (D) is written into the addressed latch. The
addressed latch will follow the data input with all non-addressed latches remaining in their
previous states. In the memory mode, all latches remain in their previous states and are
unaffected by the data or address inputs. In the 3-to-8 decoding or demultiplexing mode,
the addressed output follows the state of the (D) input with all other outputs in the LOW
state. In the reset mode all outputs are LOW and unaffected by the address (A0 to A2)
and data (D) input. When operating the 74LV259 as an address latch, changing more than
one bit of address could impose a transient-wrong address. Therefore, this should only be
done while in the memory mode.
2. Features
s Optimized for low voltage applications: 1.0 V to 3.6 V
s Accepts TTL input levels between V_CC = 2.7 V and V_CC = 3.6 V
s Typical output ground bounce < 0.8 V at V_CC = 3.3 V and T_amb = 25 °C
s Typical HIGH-level output voltage (V_OH) undershoot: > 2 V at V_CC = 3.3 V and
T_amb = 25 °C
s Combines demultiplexer and 8-bit latch
s Serial-to-parallel capability
s Output from each storage bit available
s Random (addressable) data entry
s Easily expandable
s Common reset input
s Useful as a 3-to-8 active HIGH decoder
s ESD protection:
x HBM JESD22-A114E exceeds 2000 V
x MM JESD22-A115-A exceeds 200 V
s Multiple package options
s Specified from −40 °C to +85 °C and from −40 °C to +125 °C