74LV132 Datasheet, PDF (1/17 Pages) NXP Semiconductors – Quad 2-input NAND Schmitt-trigger

74LV132
Quad 2-input NAND Schmitt trigger
Rev. 04 — 12 November 2007
Product data sheet
1. General description
The 74LV132 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HC132 and 74HCT132.
The 74LV132 contains four 2-input NAND gates which accept standard input signals.
They are capable of transforming slowly changing input signals into sharply defined,
jitter-free output signals.
The gate switches at different points for positive and negative-going signals. The
difference between the positive voltage V_T+ and the negative voltage V_T− is defined as the
input hysteresis voltage V_H.
2. Features
s Wide operating voltage: 1.0 V to 5.5 V
s Optimized for low voltage applications: 1.0 V to 3.6 V
s Accepts TTL input levels between V_CC = 2.7 V and V_CC = 3.6 V
s Typical output ground bounce < 0.8 V at V_CC = 3.3 V and T_amb = 25 °C
s Typical HIGH-level output voltage (V_OH) undershoot: > 2 V at V_CC = 3.3 V and
T_amb = 25 °C
s ESD protection:
x HBM JESD22-A114E exceeds 2000 V
x MM JESD22-A115-A exceeds 200 V
s Multiple package options
s Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Applications
s Wave and pulse shapers for highly noisy environments
s Astable multivibrators
s Monostable multivibrators