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74CBTLVD3861BQ Datasheet, PDF (1/19 Pages) NXP Semiconductors – 10-bit level-shifting bus switch with output enable Rev. 4 — 14 December 2011
74CBTLVD3861
10-bit level-shifting bus switch with output enable
Rev. 4 — 14 December 2011
Product data sheet
1. General description
The 74CBTLVD3861 is a 10-bit 3.3 V to 1.8 V level translating bus switch with one output
enable (OE) input. When OE is LOW, the switch is closed and port A is connected to the B
port. When OE is HIGH, the switch is disabled.
To ensure the high-impedance OFF-state during power-up or power-down, OE should be
tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined
by the current-sinking capability of the driver.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 3.0 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
2. Features and benefits
 Supply voltage range from 3.0 V to 3.6 V
 High noise immunity
 Complies with JEDEC standard:
 JESD8-B/JESD36 (3.0 V to 3.6 V)
 ESD protection:
 HBM JESD22-A114F exceeds 2000 V
 CDM AEC-Q100-011 revision B exceeds 1000 V
 4  switch connection between two ports
 3.3 V to 1.8 V level translation
 CMOS low power consumption
 Latch-up performance exceeds 250 mA per JESD78B Class I level A
 IOFF circuitry provides partial Power-down mode operation
 Multiple package options
 Specified from 40 C to +85 C and 40 C to +125 C