74AUP2T1326 Datasheet, PDF (1/16 Pages) NXP Semiconductors – Low-power dual supply buffer/line driver; 3-state

74AUP2T1326
Low-power dual supply buffer/line driver; 3-state
Rev. 01 — 1 July 2009
Product data sheet
1. General description
The 74AUP2T1326 is a high-performance, dual supply, low-power, low-voltage, dual
buffer/line driver with output enable circuitry.
The 74AUP2T1326 is designed for logic-level translation and combines the functions of
the 74AUP1G32 and 74AUP2G126. The buffer/line driver is controlled by two output
enable inputs (1OE and 2OE). A logic LOW on input 1OE causes the output 2Y to assume
a high-impedance OFF-state, a logic LOW on 2OE causes the output 3Y to assume a
high-impedance OFF-state. The output 1Y is the result of a logic OR of the two output
enable inputs.
The output enable inputs (1OE and 2OE) are Schmitt trigger inputs, they switch at
different voltages for positive and negative-going signals. The difference between the
positive voltage V_T+ and the negative voltage V_T− is defined as the input hysteresis voltage
V_H. The output enable inputs accept standard input signals and are capable of
transforming slowly changing input signals into sharply defined, jitter-free output signals
Both V_CC(A) and V_CC(B) can be supplied at any voltage between 1.1 V and 3.6 V making
the device suitable for interfacing between any of the low voltage nodes (1.2 V, 1.5 V,
1.8 V, 2.5 V and 3.3 V) with compatible input levels. Pins 1OE, 2OE and 1Y are referenced
to V_CC(A) and pins A, 2Y and 3Y are referenced to V_CC(B).
The device ensures low static and dynamic power consumption and is fully specified for
partial power down applications using I_OFF. The I_OFF circuitry disables the outputs,
preventing any damaging backflow current through the device when it is powered down.
2. Features
I Wide supply voltage range:
N V_CC(A): 1.1 V to 3.6 V; V_CC(B): 1.1 V to 3.6 V.
I High noise immunity
I Complies with JEDEC standards:
N JESD8-7 (1.2 V to 1.95 V)
N JESD8-5 (1.8 V to 2.7 V)
N JESD8-B (2.7 V to 3.6 V)
I ESD protection:
N HBM JESD22-A114E Class 2A exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
N CDM JESD22-C101C exceeds 1000 V
I Low static power consumption; I_CC = 0.9 µA (maximum)
I Latch-up performance exceeds 100 mA per JESD 78 Class II