74AHC86 Datasheet, PDF (1/14 Pages) NXP Semiconductors – Quad 2-input EXCLUSIVE-OR gate

74AHC86; 74AHCT86
Quad 2-input EXCLUSIVE-OR gate
Rev. 02 — 15 November 2007
Product data sheet
1. General description
The 74AHC86; 74AHCT86 are high-speed Si-gate CMOS devices and are pin compatible
with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74AHC86; 74AHCT86 provides a 2-input exclusive-OR function.
2. Features
s Balanced propagation delays
s All inputs have a Schmitt-trigger action
s Inputs accepts voltages higher than V_CC
s For 74AHC86 only: operates with CMOS input levels
s For 74AHCT86 only: operates with TTL input levels
s ESD protection:
x HBM JESD22-A114E exceeds 2000 V
x MM JESD22-A115-A exceeds 200 V
x CDM JESD22-C101C exceeds 1000 V
s Multiple package options
s Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74AHC86D
−40 °C to +125 °C
74AHCT86D
74AHC86PW −40 °C to +125 °C
74AHCT86PW
74AHC86BQ
−40 °C to +125 °C
74AHCT86BQ
Name
SO14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
Version
SOT108-1
TSSOP14
plastic thin shrink small outline package; 14 leads; SOT402-1
body width 4.4 mm
DHVQFN14
plastic dual in-line compatible thermal enhanced SOT762-1
very thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm