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M25PE40 Datasheet, PDF (51/62 Pages) STMicroelectronics – 4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout
M25PE40
DC and AC parameters
Table 22.
AC characteristics (75 MHz operation, T9HX (0.11µm) process(1))(2)(3)(4)
Test conditions specified in Table 14 and Table 15
Symbol Alt.
Parameter
Min.
Typ.
Max.
Clock frequency for the following instructions:
fC
fC FAST_READ, RDLR, PW, PP, WRLR, PE, SE, D.C.
75
SSE, DP, RDP, WREN, WRDI, RDSR, WRSR
fR
Clock frequency for READ instructions
D.C.
33
tCH(5)
tCLH Clock High time
6
tCL(5)
tCLL Clock Low time
6
Clock Slew Rate (peak to peak)
0.1
tSLCH
tCHSL
tDVCH
tCHDX
tCHSH
tSHCH
tSHSL
tSHQZ(6)
tCLQV
tCLQX
tWHSL(7)
tSHWL(7)
tDP(6)
tRDP(6)
tW
tPW(8)
tPP(8)
tCSS
tDSU
tDH
tCSH
tDIS
tV
tHO
S Active Setup time (relative to C)
S Not Active Hold time (relative to C)
Data In Setup time
Data In Hold time
S Active Hold time (relative to C)
S Not Active Setup time (relative to C)
S Deselect time
Output Disable time
Clock Low to Output Valid
Output Hold time
Write Protect Setup time
Write Protect Hold time
S to Deep Power-down
S High to Standby mode
Write Status Register cycle time
Page Write cycle time (256 bytes)
Page Program cycle time (256 bytes)
Page Program cycle time (n bytes)
5
5
2
5
5
5
100
8
8/6
0
20
100
3
30
3
15
11
23
0.8
int(n/8) ×
3
0.025(9)
tPE
Page Erase cycle time
tSE
Sector Erase cycle time
tSSE
Subsector Erase cycle time
tBE
Bulk Erase cycle time
10
20
1.5
5
80
150
8
10
1. See Important note on page 6.
2. Details of how to find the technology process in the marking are given in AN1995, see also Section 13: Ordering
information.
3. Delivery of parts operating with a maximum clock rate of 75 MHz starts from week 8 of 2008.
4. Preliminary data.
5. tCH + tCL must be greater than or equal to 1/ fC.
6. Value guaranteed by characterization, not 100% tested in production.
7. Only applicable as a constraint for a WRSR instruction when SRWD is set to ‘1’.
Unit
MHz
MHz
ns
ns
V/ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ms
ms
ms
ms
s
ms
s
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