M25P05-A Datasheet, PDF (19/52 Pages) STMicroelectronics – 512 Kbit, Low Voltage, Serial Flash Memory With 25 MHz SPI Bus Interface

M25P05-A
Instructions
Table 4. Instruction set
Instruction
Description
One-byte instruction Address Dummy Data
code
bytes bytes bytes
WREN Write enable
WRDI
RDID⁽¹⁾
Write disable
Read identification
RDSR Read status register
WRSR Write status register
READ Read data bytes
FAST_READ
Read data bytes at higher
speed
PP
Page program
SE
Sector erase
BE
Bulk erase
DP
Deep power-down
RES
Release from deep power-
down, and read electronic
signature
Release from deep power-
down
0000 0110 06h
0
0000 0100 04h
0
1001 1111 9Fh
0
0000 0101 05h
0
0000 0001 01h
0
0000 0011 03h
3
0000 1011 0Bh
3
0000 0010 02h
3
1101 1000 D8h
3
1100 0111 C7h
0
1011 1001 B9h
0
0
1010 1011 ABh
0
0
0
0
0
0
1 to 3
0
1 to ∞
0
1
0
1 to ∞
1
1 to ∞
0 1 to 256
0
0
0
0
0
0
3
1 to ∞
0
0
1. The read identification (RDID) instruction is available only in products with process technology code X and
Y (see application note AN1995).
6.1
Write enable (WREN)
The write enable (WREN) instruction (Figure 7) sets the write enable latch (WEL) bit.
The write enable latch (WEL) bit must be set prior to every page program (PP), sector erase
(SE), bulk erase (BE) and write status register (WRSR) instruction.
The write enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 7. Write enable (WREN) instruction sequence
S
01234567
C
Instruction
D
High Impedance
Q
AI02281E
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