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M45PE16 Datasheet, PDF (17/45 Pages) STMicroelectronics – 16 Mbit, low-voltage, Page-Erasable Serial Flash memory with byte alterability and a 50 MHz SPI bus interface
M45PE16
6
Instructions
Instructions
All instructions, addresses and data are shifted in and out of the device, most significant bit
first.
Serial Data Input (D) is sampled on the first rising edge of Serial Clock (C) after Chip Select
(S) is driven Low. Then, the one-byte instruction code must be shifted in to the device, most
significant bit first, on Serial Data Input (D), each bit being latched on the rising edges of
Serial Clock (C).
The instruction set is listed in Table 3.
Every instruction sequence starts with a one-byte instruction code. Depending on the
instruction, this might be followed by address bytes, or by data bytes, or by both or none.
In the case of a Read Data Bytes (READ), Read Data Bytes at Higher Speed (Fast_Read)
or Read Status Register (RDSR) instruction, the shifted-in instruction sequence is followed
by a data-out sequence. Chip Select (S) can be driven High after any bit of the data-out
sequence is being shifted out.
In the case of a Page Write (PW), Page Program (PP), Page Erase (PE), Sector Erase (SE),
Write Enable (WREN), Write Disable (WRDI), Deep Power-down (DP) or Release from
Deep Power-down (RDP) instruction, Chip Select (S) must be driven High exactly at a byte
boundary, otherwise the instruction is rejected, and is not executed. That is, Chip Select (S)
must driven High when the number of clock pulses after Chip Select (S) being driven Low is
an exact multiple of eight.
All attempts to access the memory array during a Write cycle, Program cycle or Erase cycle
are ignored, and the internal Write cycle, Program cycle or Erase cycle continues
unaffected.
Table 3. Instruction set
Instruction
Description
WREN Write Enable
WRDI Write Disable
RDID Read Identification
RDSR Read Status Register
READ Read Data Bytes
FAST_READ
Read Data Bytes at
Higher Speed
PW
Page Write
PP
Page Program
PE
Page Erase
SE
Sector Erase
DP
Deep Power-down
RDP
Release from Deep
Power-down
One-byte Instruction Address Dummy
Code
Bytes Bytes
0000 0110 06h
0
0
0000 0100 04h
0
0
1001 1111 9Fh
0
0
0000 0101 05h
0
0
0000 0011 03h
3
0
Data
Bytes
0
0
1 to 3
1 to ∞
1 to ∞
0000 1011 0Bh
3
1
1 to ∞
0000 1010 0Ah
3
0000 0010 02h
3
1101 1011 DBh
3
1101 1000 D8h
3
1011 1001 B9h
0
0
1 to 256
0
1 to 256
0
0
0
0
0
0
1010 1011 ABh
0
0
0
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