M36L0T7050T2 Datasheet, PDF (1/22 Pages) Numonyx B.V – 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory and 32 Mbit (2Mb x16) PSRAM, Multi-Chip Package

M36L0T7050T2
M36L0T7050B2
128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory
and 32 Mbit (2Mb x16) PSRAM, Multi-Chip Package
Preliminary Data
Feature summary
■ Multi-Chip Package
– 1 die of 128 Mbit (8Mb x16, Multiple Bank,
Multi-level, Burst) Flash Memory
– 1 die of 32 Mbit (2Mb x16) Pseudo SRAM
■ Supply voltage
– V_DDF = 1.7 to 1.95V
– V_CCP = V_DDQ = 2.7 to 3.1V
– V_PPF = 9V for fast program
■ Electronic signature
– Manufacturer Code: 20h
– Device Code (Top Flash Configuration)
M36L0T7050T2: 88C4h
– Device Code (Bottom Flash Configuration)
M36L0T7050B2: 88C5h
■ ECOPACK® packages available
Flash memory
■ Synchronous / Asynchronous Read
– Synchronous Burst Read mode: 52MHz
– Random Access: 85ns
■ Synchronous Burst Read Suspend
■ Programming time
– 2.5µs typical Word program time using
Buffer Enhanced Factory Program
command
■ Memory organization
– Multiple Bank Memory Array: 8 Mbit Banks
– Parameter Blocks (Top or Bottom location)
■ Dual operations
– program/erase in one Bank while read in
others
– No delay between read and write
operations
FBGA
TFBGA88 (ZAQ)
8 x 10mm
■ Block locking
– All blocks locked at power-up
– Any combination of blocks can be locked
with zero latency
– WP for Block Lock-Down
– Absolute Write Protection with V_PP = V_SS
■ Security
– 64 bit unique device number
– 2112 bit user programmable OTP Cells
■ Common Flash Interface (CFI)
■ 100,000 program/erase cycles per block
PSRAM
■ Access time: 65ns
■ 8-Word Page Access capability: 18ns
■ Low standby current: 100µA
■ Deep power down current: 10µA
■ Compatible with standard LPSRAM
■ Power-down modes
– Deep Power-Down
– 4 Mbit Partial Array Refresh
– 8 Mbit Partial Array Refresh
November 2007
Rev 0.2
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/22
www.numonyx.com
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